Browse Source

32-bit works again, use smaller opcodes for ifunc checking code

pull/17/head
PoroCYon 1 year ago
parent
commit
bfe5fc2698
5 changed files with 34 additions and 18 deletions
  1. +1
    -4
      ld/link_common.ld
  2. +6
    -0
      ld/link_i386.ld
  3. +6
    -0
      ld/link_x86_64.ld
  4. +20
    -13
      rt/loader64.asm
  5. +1
    -1
      smol/cnl.py

ld/link.ld → ld/link_common.ld View File


+ 6
- 0
ld/link_i386.ld View File

@ -0,0 +1,6 @@
OUTPUT_FORMAT("elf32-i386")
OUTPUT_ARCH(i386)
SEARCH_DIR("/usr/i386-pc-linux-gnu/lib32"); SEARCH_DIR("/usr/x86_64-pc-linux-gnu/lib32"); SEARCH_DIR("/usr/lib"); SEARCH_DIR("/usr/local/lib"); SEARCH_DIR("/usr/i386-pc-linux-gnu/lib");
INCLUDE "link_common.ld"

+ 6
- 0
ld/link_x86_64.ld View File

@ -0,0 +1,6 @@
OUTPUT_FORMAT("elf64-x86-64")
OUTPUT_ARCH(i386:x86-64)
SEARCH_DIR("/usr/x86_64-pc-linux-gnu/lib64"); SEARCH_DIR("/usr/lib"); SEARCH_DIR("/usr/local/lib"); SEARCH_DIR("/usr/x86_64-pc-linux-gnu/lib");
INCLUDE "link_common.ld"

+ 20
- 13
rt/loader64.asm View File

@ -258,20 +258,19 @@ repne scasd ; technically, scasq should be used, but meh. this is 1 byte smaller
%ifdef IFUNC_SUPPORT
; large opcode, but, ~almost the same as the next one, so,
; should compress well
mov cl, [rax + rdx * 8 + ST_INFO_OFF] ; TODO: actually mov cl, ...
%endif
mov rax, [rax + rdx * 8 + ST_VALUE_OFF]
mov rcx, [rax + rdx * 8 + ST_VALUE_OFF]
mov rax, [rax + rdx * 8 + ST_INFO_OFF ] ; actually just 'al' needed here
%ifdef SKIP_ZERO_VALUE
or rax, rax ; zero value => weak symbol or sth
jz short .next_link
jrcxz .next_link
%endif
; void* finaladdr(rax) = symoff + entry->l_addr
add rax, [r12 + L_ADDR_OFF]
; void* finaladdr(rcx) = symoff + entry->l_addr
add rcx, [r12 + L_ADDR_OFF]
%ifdef IFUNC_SUPPORT
; is this an ifunc?
and cl, ST_INFO__STT_MASK
cmp cl, STT_GNU_IFUNC
and al, ST_INFO__STT_MASK
cmp al, STT_GNU_IFUNC
xchg rcx, rax
jne .no_ifunc
; if so: call the resolver
push rdi
@ -280,10 +279,18 @@ repne scasd ; technically, scasq should be used, but meh. this is 1 byte smaller
pop r11
pop rdi
.no_ifunc:
; IFUNC_SUPPORT
%else
mov rax, [rax + rdx * 8 + ST_VALUE_OFF]
%ifdef SKIP_ZERO_VALUE
or rax, rax ; zero value => weak symbol or sth
jz short .next_link
%endif
; *phash = finaladdr
stosq
; void* finaladdr(rax) = symoff + entry->l_addr
add rax, [r12 + L_ADDR_OFF]
; IFUNC_SUPPORT
%endif
stosq ; *phash = finaladdr
cmp word [rdi], 0
jne short .next_hash
; } while (1)


+ 1
- 1
smol/cnl.py View File

@ -31,7 +31,7 @@ def nasm_assemble_elfhdr(verbose, nasm_bin, arch, rtdir, intbl, output, asflags)
def ld_link_final(verbose, cc_bin, arch, lddir, inobjs, output, ldflags, debug):
archflag = '-m64' if arch == "x86_64" else '-m32'
args = [cc_bin, archflag, '-T', lddir+'/link.ld', '-no-pie']
args = [cc_bin, archflag, '-L', lddir, '-T', lddir+('/link_%s.ld'%arch), '-no-pie']
if not debug:
args.append('-Wl,--oformat=binary')
#args = [*args, '-T', lddir+'/link.ld', '-Wl,--oformat=binary']


Loading…
Cancel
Save